FuseSoC and Edalize Unveil Future Development Plans

FuseSoC is rolling out enhanced security features, allowing users to specify trusted sources for IP cores to bolster supply chain integrity. These updates are designed to meet new regulatory demands, such as those from the Cyber Resilience Act, by providing robust mechanisms for trust management.

Additionally, FuseSoC now supports the generation of a Software Bill of Materials (SBOM) for FPGA designs. This feature integrates with larger software build processes, ensuring that the components within an FPGA design are fully documented and auditable for security and compliance purposes.

The development roadmap for FuseSoC includes significant improvements to its integration with existing build tools, particularly Bazel. The aim is to enable FuseSoC to handle RTL-related aspects seamlessly within a Bazel build environment, streamlining complex design workflows.

Furthermore, the team plans to expand support for various EDA tools, including adding LibreLane alongside the existing OpenLane integration. There are also plans for interoperability with the SiliconCompiler project and the introduction of package archives to manage static compiled files more efficiently.

This update aims to provide more flexibility and power in defining and managing IP cores.

As part of this transition, older, less efficient features will be deprecated to streamline the system. The development team is actively seeking community feedback on CAPI3 requirements to ensure the new format meets user needs effectively.

This definition is broad, allowing for diverse types of cores.

Examples of what constitutes a core include CPUs, UARTs, verification libraries, and Bus Functional Models (BFMs). The package typically includes RTL files and can also incorporate analog components, providing a comprehensive description of the reusable intellectual property.

Edalize emerged as a separate project from FuseSoC to specifically manage EDA interfacing, recognizing that some users required only package management or EDA interfacing. While Edalize handles documentation for various flows, the speaker acknowledged existing gaps in the overall documentation that need to be addressed to improve clarity and user experience.

FuseSoC cores manage dependencies using a 'default' target, which exposes the components and files that other dependent cores will access. This mechanism allows for a structured approach to how IP cores interact within a larger design.

The development team is considering renaming this 'default' target to 'public' in future versions for clearer communication of its purpose. Users can also utilize specific flags to selectively include simulation models or particular files, providing granular control over core imports and reducing unnecessary dependencies.